A NOR gate is short for NOT-OR: an OR with its output inverted. For two inputs, Y = .
OR is 0 only in row 00, so NOR is 1 only in row 00. In words: the output is 1 only when every input is 0. Any 1 on any input forces the output to 0.
By De Morgan's law, = : "not A and not B". That reading matches the rule exactly.
Like NAND, NOR is a universal gate. The constructions are mirror images of the NAND ones:
- NOT: one NOR with its inputs tied together, = .
- OR: a NOR followed by a NOR-inverter, 2 gates.
- AND: invert both inputs, then NOR them, 3 gates, since = .
Any product of sums can be built as two levels of NORs (nor nor logic).
A useful control trick: with one input held at 0, a NOR passes the other input through inverted, = . With one input held at 1, the output is stuck at 0.
The symbol is the OR shape with a bubble on the output.