ADD and SUB instructions

Also called: ADD, SUB, ADD instruction, SUB instruction

Tiny8's arithmetic instructions: ADD a does ACC ← ACC + M[a] and SUB a does ACC ← ACC − M[a], both wrapping modulo 256 and updating Z.

Tiny8 has two arithmetic instructions:

ADD a (opcode 3): ACC ← ACC + M[a]
SUB a (opcode 4): ACC ← ACC − M[a]

Both take 6 cycles. E1 reads the operand into the MDR, as LOAD does. E2 sends ACC and MDR through the ALU and loads the result into the ACC (ACCsrc = 1, LdACC = 1). The only difference is ALUop: 0 to add, 1 to subtract.

The ALU subtracts using twos complement: A − B = A + B' + 1. XOR gates invert the MDR's bits when ALUop = 1, and ALUop also supplies the carry-in for the + 1.

Results are 8 bits and wrap modulo 256. The carry out of bit 7 is dropped:

200 + 100 = 300 → 44;
3 − 5 = −2 → 254 (FE), which is −2 read as two's complement.

Both update the zero flag. SUB plus JZ is Tiny8's way to compare two numbers.

Worked example

Example

Wrapping both ways

Work out each 8-bit result and Z.

1.
ACC = 250, ADD an operand of 6: 256 → 0. ACC = 0, Z = 1.
2.
ACC = 5, SUB an operand of 9: −4 → 256 − 4 = 252 (FC). Z = 0.
3.
In binary, 5 − 9 is 00000101 + 11110110 + 1 = 11111100 = FC.

Common mistakes

Expecting a negative SUB result to show a minus sign. It wraps to a large unsigned value.
Forgetting that the sum can wrap to exactly 0 and set Z.
Thinking SUB computes M[a] − ACC. It's ACC − M[a].

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ADD and SUB instructions is taught in Basic CPU / Computer Architecture and Adders and ALUs.

Basic CPU / Computer Architecture →Adders and ALUs →

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