The arithmetic logic unit (ALU) is the part of a processor that actually computes: adding, subtracting, ANDing, ORing, comparing. It's a combinational circuit, so its output depends only on its current inputs; a register outside it holds the result.
How it's organized:
- Every operation runs at once. An adder/subtractor, an AND unit and an OR unit (and any others) all compute from A and B in parallel.
- A multiplexer picks the result. The opcode, or function select code, drives the MUX select lines, so only the chosen unit's answer reaches the output Y (result multiplexer).
- Flags describe the result: N, Z, C and V.
The ALU in this course uses a 2-bit opcode F1F0:
00AND,01OR,10ADD,11SUB- SUB = drives the controlled inverters on B and the carry-in C0, turning the adder into a subtractor
An n-bit ALU is n identical bit slices side by side, sharing the opcode lines, with the adder carries chained between slices. Logic operations work on each bit independently; only ADD and SUB use the carry chain.
To add an operation: add its unit, widen the opcode if needed (k select bits give 2ᵏ operations), widen the MUX, and re-derive every control signal from the new opcode table.