Half adder

Also called: HA

A circuit that adds two single bits, A and B, and outputs a sum bit S = A ⊕ B and a carry bit C = AB.

A half adder adds two bits. The total can be 0, 1 or 2, so it needs two outputs: the sum bit S (weight 1) and the carry C (weight 2). Read together as the 2-bit number C S, they equal A + B.

Reading the truth table one output column at a time gives the gates directly:

S is 1 when exactly one input is 1. That's XOR: S = .
C is 1 only for 1 + 1. That's AND: C = .

So a half adder is just an XOR gate and an AND gate side by side.

Why "half"? It has no input for a carry from a previous column, so it can only handle a column where nothing comes in, such as the rightmost column of a plain addition. Every other column adds three bits, which needs a full adder. Two half adders plus an OR gate make a full adder (two half adder full adder).

Why XOR and not OR for the sum? 1 + 1 must leave 0 in this column and move the 1 into the carry. OR would output 1.

		S	C
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

Worked example

Example

All four cases

Read the outputs as the 2-bit number C S.

1.
0 + 0: S = 0, C = 0. C S = 00 = 0.
2.
0 + 1 or 1 + 0: S = 1, C = 0. C S = 01 = 1.
3.
1 + 1: S = 0, C = 1. C S = 10 = 2.
4.
The XOR gives the sum column and the AND gives the carry column.

Common mistakes

Using OR for the sum. OR gives 1 for 1 + 1, but that column must hold 0.
Using a half adder in a column that has a carry-in. It can only add two bits.
Reading C S backwards. C is the high bit (weight 2).

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