Memory data register (MDR)

Also called: memory buffer register, MBR

The CPU register that holds the word just read from memory or the word about to be written. Its width equals the word size.

The MDR is the CPU's "what" register for memory. When memory is read, the word lands in the MDR. When memory is written, the word to store must be in the MDR first. The MAR says where; the MDR holds what.

In Tiny8 the MDR is loaded from one of two places, chosen by a mux:

from memory, during F2 (an instruction word) and E1 of LOAD, ADD and SUB (an operand);
from the ACC, during E1 of a STORE, ready to be written in E2.

Notice that the MDR carries both instructions and data. During fetch it holds the instruction word, which step F3 copies into the IR. Then it's free to hold the operand during execute.

Sizing rule: the MDR holds one whole memory word, so its width is the word size. Tiny8's words are 8 bits, so its MDR is 8 bits.

Worked example

Example

A STORE through the MDR

Tiny8 executes STORE C with ACC = 2A. Follow the MDR.

1.
D: MAR ← IR[3:0], so MAR = C.
2.
E1: MDR ← ACC. MDR = 2A. Memory hasn't changed yet.
3.
E2: M[MAR] ← MDR. Memory word C becomes 2A.
4.
Two steps are needed because the MDR only receives the ACC's value at E1's edge, too late to write in the same cycle.

Common mistakes

Thinking the MDR only ever holds data. During fetch it holds the instruction word.
Sizing the MDR by the number of addresses. That's the MAR.

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Memory data register (MDR) is taught in Basic CPU / Computer Architecture and Memory.

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