Read/write line (R/W)

Also called: R/W, read/write signal, read-write line, write enable, WE, write-enable signal

The control input that tells a RAM whether an access is a read or a write. On this site R/W = 1 means read and R/W = 0 means write.

A RAM can do two things to the selected word, so it needs a control line to choose. The read/write line does that.

R/W = 1: read. The chip drives the stored word onto the data lines.
R/W = 0: write. The chip stores the word that is on the data lines.

The name is a reminder: the bar (in print, over W) says that writing is the low level. Nothing happens either way unless the chip select is active.

Some chips split the job differently: a write enable (WE) pin that is asserted for writes, often active low, plus an output enable for reads. The idea is the same.

A ROM has no read/write line at all, since it can only be read. That's one of the visible differences between RAM and ROM chips.

Timing matters. During a memory write, the address and data should be stable before R/W goes to 0 and CS becomes active; otherwise the chip might store into the wrong location while the address is still changing.


0	0	0	0
0	1	0	0
1	0	0	1
1	1	1	0

Worked examples

Example

Decoding the control lines

Active-high chip select C, read/write R (1 = read). See the diagram.

1.
C = 0: neither read nor write, whatever R is.
2.
C = 1, R = 1: read.
3.
C = 1, R = 0: write. Write = .

Example

A sequence of accesses

An 8-word RAM. Chip select stays 1. Operations, in order: R/W = 0, address 5, data 4; R/W = 0, address 2, data 9; R/W = 1, address 5.

1.
First: write 4 into word 5.
2.
Second: write 9 into word 2.
3.
Third: read word 5. The RAM outputs 4.

Common mistakes

Reading R/W = 1 as write. Here 1 is read and 0 is write.
Forgetting chip select. R/W only matters while CS is active.
Looking for an R/W pin on a ROM. A plain ROM can only be read, so it has none.

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