Skip to content
BetterDL

Combinational design process

Also called: design from specification, design process, design recipe, combinational design, logic design procedure, word problem design

The step-by-step method for turning a word description into a circuit: name the signals, fill the truth table, write Σm, simplify, verify and draw.

Designing a combinational circuit from an English description feels like a blank page, but it's a fixed recipe. The only real thinking happens in step 3.

  1. Name the signals. List every input and output, and write what 1 means for each ("W = 1: window open").
  2. Fix the order. Choose which input is the MSB. That fixes the row numbers.
  3. Fill the truth table. One row per input combination, 2ⁿ rows. For each row, ask the spec whether the output should be 1. Every row needs a value.
  4. List the 1-rows as a minterm list, Σm( … ).
  5. Write the canonical SOP: one minterm per 1-row.
  6. Simplify, with algebra or a karnaugh map.
  7. Verify, then draw. Test every 1-row and a few 0-rows on the final expression before you draw gates.

With several outputs, give each its own column and repeat steps 4–7 per column (a multiple output circuit).

Translating words is where most errors come from:

  • "and", "both" → AND. "or", "at least one" → OR. "exactly one" → XOR.
  • "X unless Y" → .
  • Watch for the hidden NOT: "the window is shut" is if W = 1 means open.
P
0000
0011
0100
0111
1000
1011
1101
1111

Worked example

Example

A water pump

Spec: the pump P runs when the tank is low and the supply valve is open, or whenever the manual switch is on.

  1. 1.

    Signals: L = 1 tank low, V = 1 valve open, M = 1 manual on; P = 1 pump runs. Order L, V, M (L is the MSB).

  2. 2.

    Truth table: P = 1 on every row with M = 1 (rows 1, 3, 5, 7), and on rows where L = V = 1 (rows 6, 7).

  3. 3.

    Σm: P = Σm(1, 3, 5, 6, 7).

  4. 4.

    Canonical SOP: .

  5. 5.

    Simplify: the four rows with M = 1 combine to M, and rows 6 and 7 combine to . P = .

  6. 6.

    Verify: row 6 = 110 → 0 + 1 = 1 ✓. Row 4 = 100 → 0 + 0 = 0 ✓. Row 2 = 010 → 0 ✓.

  7. 7.

    Gates: one AND for , one OR with M.

Common mistakes

  • Missing a hidden NOT. If the legend says W = 1 means open, "the window is shut" must appear as .

  • Skipping rows the spec doesn't mention. Every row of the table needs an output value.

  • Changing the MSB halfway. If A is the MSB when you number the rows, it must be the MSB when you write the minterms.

  • Confusing "at least two" with "exactly two". They differ on the all-ones row.

Practice Combinational design process

Interactive questions with instant feedback and a worked solution for every wrong answer.

Learn it step by step

Combinational design process is taught in Combinational Logic.