Multiple-output circuit

Also called: multi-output circuit, multiple-output function, multiple-output design, multi-output function

A combinational circuit with more than one output computed from the same inputs. Each output gets its own column, minterm list and expression.

Many real circuits produce several outputs from one set of inputs: a priority encoder gives Y1, Y0 and V; a magnitude comparator gives G, E and L; an adder gives a sum and a carry. That's a multiple-output circuit.

Designing one uses the same combinational design process, with one change: the truth table gets one output column per output. The input columns are shared.

Then treat each column as its own function:

write its own Σm list
simplify it separately
verify it separately

The inputs are wired to every output's gates. Where the outputs have terms in common, a gate can feed several outputs, which saves hardware. A decoder is the extreme case: it builds every minterm once, and each output just ORs the ones it needs.

A ROM stores a multiple-output function naturally: each output is one bit of the stored word.

		Z	P
0	0	1	0
0	1	0	1
1	0	0	1
1	1	0	0

Worked example

Example

Two outputs from a 2-bit number

AB is a 2-bit unsigned number (A is the MSB). Z = 1 when the number is 0. P = 1 when it is a power of two (1 or 2).

1.
One table, two output columns, shown in the diagram.
2.
Z: only row 0. Z = Σm(0) = .
3.
P: rows 1 and 2. P = Σm(1, 2) = = .
4.
Verify row 3 (11): Z = 0 and P = 0. 3 is neither zero nor a power of two. ✓
5.
Hardware: a NOR gate for Z and an XOR gate for P, both fed by A and B.

Common mistakes

Writing one combined Σm list for all outputs. Each output has its own list.
Verifying only one output. A row can be right for one column and wrong for another.
Duplicating gates. If two outputs need the same product term, build it once and share it.

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Multiple-output circuit is taught in Combinational Logic.

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