A decoder with n inputs produces every minterm of those inputs, one per output line. The canonical sum of minterms of a function is an OR of some of those minterms. So:
F = OR of the decoder outputs whose numbers are in F's Σm list.
- Get F's minterm list.
- Wire the variables to the decoder inputs in order: MSB variable to the MSB pin.
- OR together outputs Yᵢ for each i in the list.
No simplification is needed, and every row is right by construction.
The complement trick. If F has more 1s than 0s, collect the 0-rows instead. Their OR is , so a NOR gate gives F back with fewer inputs. F = Σm(0, 1, 2, 3, 4, 5) is 0 only on rows 6 and 7, so F = : a 2-input NOR instead of a 6-input OR.
Sharing. One decoder serves any number of functions of the same inputs. Each needs only its own OR gate, and one output can feed several gates.
Active-low outputs. Many decoder chips have active low outputs (the selected line goes to 0). Then a NAND gate on the chosen outputs does the OR's job, by De Morgan.
A ROM is this same circuit, mass-produced: an address decoder plus an OR array.
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 | 1 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 1 |