DRAM

Also called: dynamic RAM, dynamic random-access memory, DRAM cell, 1T1C cell, one-transistor cell

Dynamic RAM: read/write memory that stores each bit as charge on a tiny capacitor. Dense and cheap, but the charge leaks, so every cell must be refreshed.

DRAM stores each bit as electric charge on a tiny capacitor, with one transistor acting as a switch to the bit line. A charged capacitor is a 1; an empty one is a 0. That "one transistor, one capacitor" (1T1C) cell is about as small as a memory cell gets.

The catch is that the charge leaks away, in milliseconds. So the chip must read every cell and write it back regularly, long before the charge fades. That is refresh, and it's why the memory is called dynamic.

Reading is also a destructive read: connecting the capacitor to the bit line drains it. The chip senses the value and immediately writes it back, so to the user a read looks harmless.

Why put up with all this? Density. One transistor and one capacitor take far less area than SRAM's six transistors, so a DRAM chip holds many more bits and costs much less per bit. That's why a computer's main memory, gigabytes of it, is DRAM.

Like SRAM, DRAM is volatile: without power, the charge is gone.

Worked examples

Example

How often is a row refreshed?

A DRAM must refresh all 8192 of its rows every 64 ms, spreading the work evenly.

1.
Time per row: 64 ms ÷ 8192 = 0.0078125 ms.
2.
That's about 7.8 µs: one row refresh every 7.8 microseconds, forever, while powered.
3.
Refresh happens a whole row at a time, which is why it's counted in rows, not bits.

Example

What if refresh stops?

A DRAM cell holds a 1, and refresh is switched off.

1.
The capacitor's charge leaks away.
2.
After long enough, the sense circuit can no longer tell it from an empty capacitor.
3.
The cell reads as 0: the bit has been lost, even though power stayed on.

Common mistakes

Thinking DRAM keeps its data as long as it is powered. Without refresh, the charge leaks away.
Calling DRAM non-volatile. With the power off, every cell empties.
Thinking a DRAM read erases the data for good. The chip writes the value back automatically.

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