A finite state machine (FSM) is a disciplined way to use memory. At any moment the circuit is in one of a fixed, finite set of states. At each active clock edge it takes exactly one transition, to a next state chosen by the present state and the inputs.
An FSM is fully described by:
- its states, including an initial state;
- its inputs and outputs;
- the next-state rule, drawn as a state diagram or written as a state table;
- the output rule.
In hardware it's always three parts:
- a state register of flip-flops holding the present state;
- next-state logic, combinational gates that compute the next state from the state and inputs;
- output logic, gates that compute the outputs.
The output rule gives the two families. In a moore machine the outputs depend only on the state. In a mealy machine they also depend on the present inputs.
FSMs run traffic lights, vending machines, serial receivers, the control unit of a CPU and every sequence detector. A counter is an FSM too, usually one with no inputs besides the clock.