A flip-flop stores one bit and changes it only at an instant: the active edge of its clock. Between edges its output holds, no matter what the data inputs do.
That single-instant behavior is called edge-triggering, and it is what makes flip-flops the workhorse of clocked design. Every flip-flop in a circuit samples its inputs at the same moment, using the values from just before the edge, and only then do the outputs change. So data moves exactly one step per clock, which keeps large circuits predictable.
The common types differ only in how their inputs choose the next value:
- D flip-flop: Q⁺ = D. Loads whatever is on D.
- JK flip-flop: hold, reset, set or toggle.
- T flip-flop: toggle when T = 1, hold when T = 0.
- SR flip-flop: a clocked version of the SR latch.
Unless a question says otherwise, flip-flops in this course trigger on the rising edge. A bubble on the clock pin means the falling edge instead.
Many flip-flops also have preset and clear pins that act immediately, without waiting for an edge. Groups of flip-flops sharing one clock form a register.