Single-cycle processor

Also called: single-cycle, single-cycle CPU, single cycle, single-cycle datapath

A CPU that completes every instruction in one long clock cycle. CPI is 1, but the period must fit the slowest instruction.

A single-cycle processor fetches, decodes and executes each instruction within one clock cycle. Everything happens between two edges.

What follows from that:

CPI = 1. Every instruction takes exactly one cycle.
The period is long. It must fit the slowest instruction's whole journey: memory read, decode, register read, ALU, another memory access, write-back. Fast instructions waste the rest of the cycle.
No hardware reuse. Anything needed twice in one instruction must be duplicated. Fetching the instruction and reading its data both need memory in the same cycle, so there must be two memories (or two ports): a harvard architecture split. Likewise, PC + 1 needs its own adder, separate from the ALU.

Compare a multi cycle processor like Tiny8, which splits each instruction into short steps. Which is faster depends on the numbers: compute instructions × CPI × period for both, using cpu execution time.

Worked example

Example

Single-cycle versus multi-cycle

A single-cycle CPU needs an 800 ps clock. A multi-cycle version uses a 160 ps clock, with memory instructions taking 6 cycles and jumps 5. A program executes 7 memory instructions and 3 jumps.

1.
Single-cycle: 10 instructions × 1 cycle × 800 ps = 8000 ps = 8 ns.
2.
Multi-cycle cycles: 7 × 6 + 3 × 5 = 42 + 15 = 57.
3.
Multi-cycle time: 57 × 160 ps = 9120 ps = 9.12 ns.
4.
Here the single-cycle CPU wins. With a 120 ps multi-cycle clock it would be 6.84 ns and lose.

Common mistakes

Thinking CPI = 1 makes it fastest. The long period can cancel the advantage.
Assuming one memory is enough. An instruction fetch and a data read in the same cycle need two.

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