Harvard architecture

Also called: separate instruction and data memory, split memory architecture

A computer design with separate memories, and paths, for instructions and for data, so both can be accessed in the same cycle.

In a Harvard architecture, instructions and data live in two separate memories, each with its own address and data path. The alternative, one shared memory for both, is the von Neumann design of the stored program computer.

Why split them? Because one memory can do only one access per cycle. With separate memories, the CPU can fetch the next instruction and read or write data at the same time.

That matters most for a single cycle processor. It must fetch an instruction and read its operand within one clock cycle, so it needs two memories (or one memory with two ports). A multi cycle processor like Tiny8 doesn't: the instruction fetch (F2) and the operand read (E1) happen in different cycles, so one memory serves both.

Trade-offs:

Harvard: more bandwidth, but two memories to build, and a program can't easily treat its own code as data.
Shared (von Neumann): simpler and more flexible, but instruction and data accesses take turns.

Many real chips mix the two: separate instruction and data caches in front of one shared main memory.

Worked example

Example

Does this CPU need two memories?

Consider a single-cycle CPU and a multi-cycle CPU, each running LOAD 9.

1.
Single-cycle: in one cycle it must read the LOAD instruction and then read M[9]. One single-ported memory can't do both, so it needs separate instruction and data memories.
2.
Multi-cycle (Tiny8): the instruction is read in F2 and M[9] in E1. Different cycles, so one shared memory is enough.

Common mistakes

Thinking every CPU needs separate memories. A multi-cycle design can share one.
Thinking a single-cycle CPU can read two words from one single-ported memory in one cycle.