Two-level full adder

Also called: sum-of-products full adder, SOP full adder

A full adder built directly from its minimal equations in two levels of logic: a 3-input XOR for S, and three ANDs feeding a 3-input OR for Cout.

The most direct way to build a full adder is to implement each output equation in two levels of gates:

S = : one 3-input XOR
Cout = : three 2-input ANDs feeding a 3-input OR, a minimal sum of products

The carry equation comes from the K-map of Σm(3, 5, 6, 7): three overlapping pairs, each including the 111 cell. Each product term says "these two inputs are both 1", so Cout = 1 when at least two of the three are 1.

Compared with the two-half-adder version:

both use 5 gates
the two-level version uses wider gates (a 3-input XOR and a 3-input OR)
the two-level carry is 2 gate delays from any input; the half-adder version's carry is 3 from A or B but only 2 from C

Neither form is always better. A ripple-carry adder cares most about the carry-in to carry-out path, which is 2 gate delays in both.

A\BC	00	01	11	10
0	0m0	0m1	1m3	0m2
1	0m4	1m5	1m7	1m6

Worked example

Example

Evaluating the two-level form

A = 0, B = 1, C = 1 in the circuit below.

1.
S = 0 ⊕ 1 ⊕ 1 = 0.
2.
The AND gates give AB = 0, AC = 0, BC = 1.
3.
Cout = 0 + 0 + 1 = 1.
4.
Check by counting: two 1s, so Cout S = 10.

Common mistakes

Trying to simplify S with a K-map. Its map is a checkerboard.
Writing Cout = , which is 1 for A = B = 0, C = 1.
Assuming two-level means faster on every path. The carry-in path is the same 2 delays in both forms.