2:1 multiplexer

Also called: 2:1 MUX, 2-to-1 multiplexer, 2-to-1 MUX, two-input multiplexer, 2x1 MUX

The smallest multiplexer: two data inputs I0 and I1, one select S and one output, with Y = I0 when S = 0 and Y = I1 when S = 1.

The 2:1 multiplexer is the basic switch from which bigger multiplexers are built. It has two data inputs, I0 and I1, one select line S, and one output Y.

S = 0: Y = I0.
S = 1: Y = I1.

In one equation: Y = .

Read it as two doors. The term is a door for I0 that is open only while S = 0. The term is a door for I1 that is open only while S = 1. Since S can't be 0 and 1 at once, exactly one door is open, and the OR gate passes whatever comes through it. The input behind the closed door has no effect at all.

Why it matters:

It is the building block of a mux tree: three 2:1 MUXes make a 4:1 MUX, seven make an 8:1.
Wiring constants or variables to its data inputs turns it into any 2-input gate. It's an example of shannon expansion with one variable.
In a CPU it chooses between two sources, such as "next instruction" and "jump target" for the program counter.

Worked examples

Example

Tracing the gates

S = 1, I0 = 1, I1 = 0.

1.
NOT gate: = 0.
2.
Upper AND: = 0 · 1 = 0. The I0 door is shut.
3.
Lower AND: = 1 · 0 = 0. The I1 door is open, and I1 happens to be 0.
4.
OR: Y = 0 + 0 = 0, which is I1, as it should be for S = 1.

Example

A 2:1 MUX as an OR gate

Wire S = A, I0 = B, I1 = 1. Which function is Y?

1.
Substitute into : Y = = .
2.
Simplify: = .
3.
So Y = , an OR gate. When A = 1 the MUX outputs the constant 1; when A = 0 it outputs B.

Common mistakes

Getting the selection backwards. S = 0 picks I0, the input whose number matches the select value.
Thinking the unselected input still matters. While S = 0, I1 can do anything and Y doesn't change.
Writing Y = . That swaps the doors, so S = 0 would pick I1.

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2:1 multiplexer is taught in Combinational Logic.

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