A multiplexer is a digitally controlled switch. It has several data inputs, one output, and a few select lines. The select lines, read as a binary number, say which data input to pass through.
- A 2:1 MUX has inputs I0, I1 and one select S.
- A 4:1 MUX has I0–I3 and selects S1 S0.
- In general a 2ⁿ:1 MUX has 2ⁿ data inputs and n select lines.
Inside, each data input is ANDed with the minterm of the select code that picks it, and an OR gate combines the results. For a 4:1 MUX:
Y =
Exactly one of those AND gates is open at a time, so exactly one data input reaches Y.
Where you'll meet it:
- Inside a CPU's datapath, MUXes choose which register feeds the ALU, or whether the next address is the next instruction or a jump target.
- As a function generator: with the variables on the selects and constants on the data inputs, a MUX is a lookup table that can build any function. See multiplexer implementation.
Its mirror image is the demultiplexer: one input, many outputs.