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Unsigned overflow

Also called: unsigned arithmetic overflow

Overflow for unsigned numbers: an addition's true sum needs more bits than are available, shown by a carry-out of 1 from the most significant bit.

Unsigned overflow happens when an unsigned result is bigger than 2ⁿ − 1, the largest n-bit value, or (for subtraction) less than 0.

For addition the test is simple: look at the carry out. A carry-out of 1 means the true sum needed an extra bit, so the n bits you kept are wrong. What's left is the true sum minus 2ⁿ: the result has wrapped around.

For example, 4-bit 1110 + 0011 = 1 0001. The true sum 14 + 3 = 17 doesn't fit, and the 4 bits show 1 = 17 − 16.

For subtraction on an adder (A + inverted B + 1), the sense flips. Carry-out 0 means a borrow was needed: A < B, and the unsigned result is wrong.

Unsigned overflow says nothing about signed overflow. The same addition can overflow one way and not the other, because the unsigned range breaks between 1111 and 0000 while the signed range breaks between 0111 and 1000.

Processors store the carry-out in the carry flag. Code that works with unsigned numbers (addresses, sizes, counts) checks that flag.

1
256
0
128
0
64
0
32
0
16
1
8
0
4
0
2
0
1

Worked example

Example

200 + 64 in 8 bits

11001000 + 01000000. The largest 8-bit unsigned value is 255.

  1. 1.

    Bits 0–5 just copy: 001000.

  2. 2.

    Bit 6: 1 + 1 = 10₂. Write 0, carry 1.

  3. 3.

    Bit 7: 1 + 0 + 1 = 10₂. Write 0, carry-out 1.

  4. 4.

    Result: 00001000 with carry-out 1. The carry-out says the sum didn't fit.

  5. 5.

    The 8 bits show 8 = 264 − 256, and 200 + 64 = 264.

Common mistakes

  • Using the sign rule for unsigned numbers.

  • Treating carry-out 0 after an unsigned subtraction as fine. It means a borrow.

  • Expecting hardware to stop at the largest value. It wraps around silently.

Practice Unsigned overflow

Interactive questions with instant feedback and a worked solution for every wrong answer.

Learn it step by step

Unsigned overflow is taught in Number Systems and Adders and ALUs.