Many datapath circuits do the same thing to every bit. Instead of designing an n-bit circuit all at once, you design one bit slice, the circuit for a single bit position, and copy it n times.
A 1-bit slice of the course's ALU contains:
- a controlled inverter on B (an XOR driven by SUB)
- a full adder for A, the possibly inverted B, and the carry from the slice to its right
- the logic units, here an AND gate and an OR gate
- a result multiplexer that picks one unit's output as Y, using the opcode
To make n bits:
- place n slices side by side
- connect every slice to the same opcode lines
- chain the carries: slice i's carry-out feeds slice i + 1's carry-in, and SUB drives slice 0's carry-in
- add the flag logic after the slices, looking at all n outputs and the top two carries
Bit slicing is why designs scale: a 4-bit and a 64-bit ALU differ only in how many slices you place. In the 1970s, companies even sold 4-bit ALU slice chips that designers cascaded into wider processors.