Hardwired control

Also called: hardwired control unit, control FSM, control state machine

A control unit built from gates and flip-flops as a finite state machine, computing each control signal directly from the state and opcode.

In hardwired control, the control unit is an ordinary finite state machine built from flip-flops and gates:

one state per step (F1, F2, F3, D, E1, E2 in Tiny8), moving on at each clock edge;
inputs: the instruction class from the opcode decoder, and status bits like Z;
outputs: the control signals, each produced by logic from the state, the opcode and Z.

Each control signal becomes a Boolean equation: an OR of "step AND instruction" terms, one for each step where it must be 1. With one signal per state (F1 = 1 while in F1, and so on), Tiny8's IR loads only in F3, so LdIR = F3. The MAR loads in F1 and D for every instruction, so LdMAR = F1 + D. Unused opcodes are don't-cares, which can shrink the logic on a K-map.

On HALT, the FSM stays in E1 and asserts nothing, so the CPU stops.

Trade-offs compared with microprogrammed control:

Faster: signals come straight out of gates.
Harder to change: adding an instruction means new terms in many equations and a new next-state rule.

Worked examples

Example

Writing an equation from a signal list

In Tiny8, MARsrc picks the IR's address field (1) or the PC (0). The MAR loads in F1 from the PC and in D from the IR. Find MARsrc.

1.
The only step that needs MARsrc = 1 is D.
2.
In every other step either the MAR loads from the PC (F1, needs 0) or doesn't load at all (don't-care).
3.
So MARsrc = D works: 1 in D, 0 in F1, and anything elsewhere is fine.

Example

Next-state rule

From E1, where does the Tiny8 FSM go?

1.
LOAD, STORE, ADD, SUB need a second execute step: go to E2.
2.
JMP and JZ are done after one: go to F1.
3.
HALT: stay in E1 for ever.

Common mistakes

Using the plain decoder output where a step term is needed. In F2 the IR still holds the previous instruction, so a signal must usually be ANDed with its step.
Forgetting that a not-taken JZ still passes through E1, using a cycle.

Practice Hardwired control

Interactive questions with instant feedback and a worked solution for every wrong answer.

Basic CPU / Computer Architecture lesson full course

And 5 more in the Basic CPU / Computer Architecture lesson.

Practice exams

Learn it step by step

Hardwired control is taught in Basic CPU / Computer Architecture and Finite State Machines.

Basic CPU / Computer Architecture →Finite State Machines →

All terms