Instruction fetch

Also called: fetch, fetch step, fetch phase, fetch cycle

The first part of every instruction cycle: read the word the program counter points at into the instruction register and advance the PC.

Fetch brings the next instruction into the CPU. It's identical for every instruction, because the CPU doesn't yet know what the instruction is.

Tiny8 fetches in three clock cycles:

F1 MAR ← PC: send the instruction's address to memory. Memory can only read once the address is in the MAR.
F2 MDR ← M[MAR], PC ← PC + 1: read the word into the MDR, and at the same edge point the PC at the next instruction.
F3 IR ← MDR: move the word into the IR, freeing the MDR for operand data.

Why increment the PC during fetch? Most instructions are followed by the next word, so advancing straight away, in parallel with the read, saves time. A jump just overwrites the PC later.

Because the IR only receives the new instruction at F3's edge, the fetch steps can't depend on the opcode. During F1 and F2 the decoder still shows the previous instruction.

Worked example

Example

Fetching ADD B

PC = 9 and M[9] = 3B. The IR holds 1E from the last instruction.

1.
F1: MAR = 9. Nothing else changes.
2.
F2: MDR = 3B, PC = A. Both change at the same edge.
3.
F3: IR = 3B. Only now does the decoder see ADD.
4.
The fetch took 3 cycles, as it does for every Tiny8 instruction.

Common mistakes

Loading the MAR from the PC and reading memory in the same step. The read has to wait one cycle.
Letting the PC load in F3 as well. It would advance twice and skip an instruction.

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Instruction fetch is taught in Basic CPU / Computer Architecture.

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