Instruction set (ISA)

Also called: instruction set architecture

The complete list of instructions a CPU understands, with their encodings and meanings. It is the contract between hardware and software.

A CPU's instruction set is every instruction it can carry out, with each one's opcode, format and exact effect. The fuller name, instruction set architecture (ISA), also covers the registers and memory model a programmer can see.

The ISA is a contract. Software is written to it, and any hardware that honors it can run that software, however differently it's built inside. A single cycle processor and a multi cycle processor can share one ISA.

Tiny8's whole instruction set:

0 HALT: stop.
1 LOAD a: ACC ← M[a]
2 STORE a: M[a] ← ACC
3 ADD a: ACC ← ACC + M[a]
4 SUB a: ACC ← ACC − M[a]
5 JMP a: PC ← a
6 JZ a: if Z = 1 then PC ← a

Opcodes 7 to F are unused. Seven instructions are enough to write loops, comparisons and arithmetic, which shows how little a CPU really needs. Real ISAs, such as ARM, x86 and RISC-V, have hundreds.

Worked example

Example

Using only the instruction set

Tiny8 has no 'copy' instruction. How do you copy M[B] into M[C]?

1.
There's no memory-to-memory move, so go through the ACC.
2.
LOAD B (1B): ACC = M[B].
3.
STORE C (2C): M[C] = ACC.
4.
Two instructions, 12 cycles. The ISA decides what's possible in one step.

Common mistakes

Thinking the ISA describes the internal wiring. It describes what software sees, not how it's built.
Assuming unused opcodes do nothing. In Tiny8 they're undefined; a program shouldn't reach them.

Practice Instruction set (ISA)

Interactive questions with instant feedback and a worked solution for every wrong answer.

Basic CPU / Computer Architecture lesson full course

Put these instructions in order (address 0 first) so that the program stores M[E] − M[F] into M[D] and then stops.

Learn it step by step

Instruction set (ISA) is taught in Basic CPU / Computer Architecture.

Basic CPU / Computer Architecture →

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