Terminal count (carry out)

Also called: TC, ripple carry out, RCO, terminal count output, terminal count

An output that is 1 while a counter sits in its last state before wrapping, used to flag rollover and to chain counters together.

A counter's terminal count output (TC, or RCO, ripple carry out, on many chips) is 1 while the counter is in its final state, the one just before it wraps.

4-bit up counter: TC = , 1 at 1111.
4-bit down counter: TC = , 1 at 0000.
BCD counter: 1 at 1001 (9). Within states 0–9, is enough.

Counters with a count enable usually AND the enable in as well, TC = , so that TC only says "I am about to wrap at this edge".

TC is the counter's version of a carry: it's 1 exactly when adding 1 would carry out of the top bit. That's why it's the key to cascading counters: connect TC of the low counter to E of the high one, on the same clock, and the high counter steps once each time the low one wraps. It's also a ready-made frequency divider output: it is 1 for one clock period in every N.

Worked examples

Example

An 8-bit counter from two 4-bit counters

The low counter's TC = drives the high counter's E. Both share the clock, and the low counter's E is 1. The pair holds high 0010, low 1111 (0x2F = 47).

1.
Low counter: at 1111 with E = 1, so its TC = 1.
2.
High counter: its E = TC = 1, so it counts at this edge: 0010 → 0011.
3.
Low counter wraps: 1111 → 0000.
4.
The pair now reads 0011 0000 = 0x30 = 48 = 47 + 1 ✓.

Example

Why TC includes E

Suppose TC were just and the low counter is paused (E = 0) at 1111 for three edges.

1.
TC would stay 1 for all three edges, so the high counter would count three times.
2.
But the low counter never wrapped. The combined count would jump by 48 instead of holding.
3.
With TC = , TC = 0 while paused, and the high counter holds too ✓.

Common mistakes

Placing TC in the state after the wrap (0000). It's high in the last state, 1111, so the next counter is enabled at the very edge where the wrap happens.
Leaving E out of TC in a cascade, so the upper counter keeps counting while the lower one is paused.
Clocking the next counter from TC instead of enabling it. That rebuilds a ripple counter, with its delays and glitches.

Practice Terminal count (carry out)

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Terminal count (carry out) is taught in Counters.

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