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Two-dimensional decoding

Also called: 2D decoding, row and column decoding, coincident decoding, row decoder, column decoder, X-Y decoding

Arranging memory cells in a grid and decoding the address in two halves, one for the row and one for the column, so the decoders stay small.

A memory with k address bits needs 2ᵏ selections. A single k-to-2ᵏ address decoder for a million words would be enormous. Two-dimensional decoding fixes that by arranging the cells as a roughly square grid.

  • Some address bits drive a row decoder, which activates one word line.
  • The other bits drive a column decoder, which picks one column.
  • The cell at the crossing of the chosen row and column is the one accessed.

The savings are dramatic. For 1024 × 1 bits as a 32 × 32 grid:

  • one decoder: 1024 outputs
  • two 5-to-32 decoders: 32 + 32 = 64 outputs

In general, splitting k bits evenly gives 2 × 2^(k/2) outputs instead of 2ᵏ.

Real DRAM and SRAM chips are organized this way. In DRAM it also explains why refresh works a row at a time: activating a word line reads and restores a whole row together.

A1A0W0W1W2W3

Worked example

Example

A 16K × 1 memory

Organize 16,384 one-bit cells as a square grid.

  1. 1.

    16,384 = 2¹⁴, so 14 address bits.

  2. 2.

    Square grid: 2⁷ × 2⁷ = 128 rows × 128 columns.

  3. 3.

    Row decoder: 7-to-128. Column decoder: 7-to-128.

  4. 4.

    Outputs: 128 + 128 = 256, instead of 16,384 for a single decoder.

Common mistakes

  • Multiplying the two decoders' outputs. The cost is rows + columns; their product is the number of cells.

  • Thinking 2D decoding changes the memory's organization. It's still 16K × 1 to the outside; only the inside layout changes.

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Two-dimensional decoding is taught in Memory.

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