Hold time

Also called: t_hold, thold, hold window

The minimum time a flip-flop's data input must stay stable after the active clock edge so the captured value is not disturbed.

The hold time (th) is how long after a clock edge a flip flop's data input must stay steady.

Why it exists: the edge starts the capture, but the flip-flop's internal gates need a moment to lock the new value in. If D changes too soon after the edge, the new D can leak in and corrupt what was just captured.

Hold time pairs with setup time, the time D must be steady before the edge. Together they define a window around the edge: from (edge − tsu) to (edge + th), D must not change. Breaking it can cause a wrong value or metastability.

Hold time is the subtle one. A setup problem can be fixed by slowing the clock, but a hold problem cannot, because it depends on how quickly the next value arrives after the same edge, not on the clock period. If one flip-flop feeds another through very little logic, the new value can race through and arrive within the hold window. The timing topic's hold constraint checks for this.

Some flip-flops have a hold time of zero or even a negative value, meaning D may change right at the edge.

Worked examples

Example

Earliest moment D may change

A flip-flop has th = 2 ns. The clock rises at t = 45 ns. What is the earliest time D may change?

1.
D must stay stable until th after the edge.
2.
45 + 2 = 47 ns.
3.
D may change at t = 47 ns or later.

Example

Spotting a hold violation

th = 0.8 ns. The clock rises at t = 12 ns and D changes at t = 12.3 ns.

1.
Hold window ends at 12 + 0.8 = 12.8 ns.
2.
12.3 ns is inside the window.
3.
Hold violation: D changed too soon after the edge. The captured value is unreliable.
4.
Lowering the clock frequency would not help; the change still happens 0.3 ns after the edge.

Common mistakes

Confusing hold time with the "hold" input combination (like S = R = 0 or J = K = 0). They are unrelated ideas that share a word.
Thinking a slower clock fixes hold violations. Hold depends on delays after one edge, not on the period.
Measuring hold time before the edge. It is measured after.

Practice Hold time

Interactive questions with instant feedback and a worked solution for every wrong answer.

Latches and Flip-Flops lesson full course

Timing and Sequential Logic lesson full course

Practice exams

Learn it step by step

Hold time is taught in Latches and Flip-Flops and Timing and Sequential Logic.

Latches and Flip-Flops →Timing and Sequential Logic →

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