Latency answers "how long does one item take?" It's the time from when an input enters a system until its result comes out.
For a block of logic between registers, the latency is one clock period. For an N-stage pipeline, each item spends one period in each stage:
latency = N × T
Latency is different from throughput, which asks "how many items come out per second?" A car factory might take two days to build one car (latency) but finish one every minute (throughput).
Pipelining usually raises latency a little. The total logic is the same, but each extra pipeline register adds its register overhead, and the period must suit the slowest stage. What pipelining improves is throughput.
Latency appears elsewhere in this topic too: a two flip flop synchronizer adds one or two cycles of latency before the circuit sees an input.