Latch vs flip-flop

Also called: latch versus flip-flop, flip-flop vs latch, difference between latch and flip-flop, window vs camera

A latch is level-sensitive and follows its input while enabled; a flip-flop is edge-triggered and samples its input only at a clock edge.

Both a latch and a flip flop store one bit. The difference is when they let a new value in.

A latch is level sensitive. While its enable is active it is transparent: Q follows D continuously, glitches included. When the enable goes inactive, Q freezes on the last value.
A flip-flop is edge triggered. It samples D only at the active clock edge and holds Q until the next edge. What D does between edges never reaches Q.

The course's picture: a latch is a window (open for a while, you see everything), and a flip-flop is a camera (one click per edge, you see one photo).

Why the difference matters: when storage elements are chained, as in shift registers, counters and pipelines, latches sharing one enable let a bit run through several stages during one long enable pulse. Flip-flops move data exactly one stage per edge. That predictability is why synchronous designs are built from flip-flops.

Latches are not obsolete: they are smaller and are used inside flip-flops (a flip-flop is often two latches back to back, enabled on opposite clock levels) and in some high-speed designs. But for this course, if a question asks which one to use for clocked storage, the answer is a flip-flop.

A quick identification test on a waveform: if Q changes in the middle of a clock level, the device is a latch.

Worked examples

Example

Window vs camera on one waveform

Feed the same clock and data into two devices: a D latch that is open while CLK is high, and a D flip-flop that acts on rising edges. Both start at 0. CLK rises in slots 2 and 7.

1.
Slot 2: CLK rises with D = 1. The latch opens and shows 1; the flip-flop photographs 1.
2.
Slots 3–4: CLK is still high. D goes 0 then 1. The latch follows both changes; the flip-flop keeps its photo, 1.
3.
Slots 5–6: CLK low. The latch is closed and holds 1. D falls in slot 6, but neither device reacts.
4.
Slot 7: CLK rises with D = 0. Both show 0.
5.
Slots 8–9: the latch follows D to 1 and back to 0. The flip-flop stays at 0.
6.
The latch changed six times; the flip-flop changed twice.

Example

Identifying the device from Q

Q changes in slots 3 and 4, while CLK sits at 1 from slot 2 to slot 4. Which device made Q?

1.
A positive-edge flip-flop can only change at slot 2, the rising edge.
2.
A negative-edge flip-flop can only change where CLK falls.
3.
Changes in the middle of a high level mean the device was transparent: a latch enabled while CLK = 1.

Common mistakes

Saying a latch updates once per enable pulse. It can change many times while enabled.
Saying a flip-flop is "a latch with a clock". A gated latch also has a clock or enable; the difference is level versus edge.
Thinking a shift register still works with latches in place of flip-flops. While the enable is high, a bit can race through several stages.

Practice Latch vs flip-flop

Interactive questions with instant feedback and a worked solution for every wrong answer.

Latches and Flip-Flops lesson full course

Registers lesson full course

A shift register works just as well if its edge-triggered flip-flops are replaced by transparent D latches sharing one enable.

Practice exams

Learn it step by step

Latch vs flip-flop is taught in Latches and Flip-Flops and Registers.

Latches and Flip-Flops →Registers →

All terms