Propagation delay

Also called: tpd, t_pd, maximum delay, worst-case delay

The longest time from an input change until a gate or circuit output has settled at its new, correct value. Written tpd.

Real gates are built from transistors, and transistors take time to switch. So when an input changes, the output doesn't follow instantly. The propagation delay tpd is the worst case: the longest you could ever wait before the output is guaranteed to show its new, correct value.

Think of it as a promise from the gate's designer: "after tpd, you can trust me." Before that, the output might still be old, or halfway through changing.

Why it matters:

It sets how fast a circuit can run. A clock can't tick again until every output it depends on has settled.
Delays add along a chain of gates, so a long chain is slow. The slowest chain is the critical path.
It has a partner, the contamination delay tcd, which is the shortest time before the output can start to move. Always tcd ≤ tpd.

Gate delays are tiny, so they're quoted in nanoseconds (1 ns = 10⁻⁹ s) or picoseconds (1 ps = 10⁻¹² s). 1 ns = 1000 ps. In this course wires count as zero delay, and each gate type is given its own tpd. For a flip-flop, the equivalent number is the clock to q delay.

Worked examples

Example

When is a NAND output safe to read?

A NAND gate has tpd = 35 ps. Its inputs change at t = 1.2 ns. When is the output guaranteed correct?

1.
Put both numbers in one unit: 1.2 ns = 1200 ps.
2.
Add the propagation delay: 1200 + 35 = 1235 ps.
3.
So from t = 1235 ps (1.235 ns) on, the output is guaranteed to be the new value.
4.
Before that it might already be right, but nothing promises it.

Example

A chain of inverters

Three inverters are wired in series, each with tpd = 20 ps. The first input changes at t = 0.

1.
The change has to pass through each inverter in turn, so the delays add.
2.
Total: 20 + 20 + 20 = 60 ps.
3.
The final output is guaranteed settled at t = 60 ps. Three inversions make it the complement of the input.

Common mistakes

Using tpd to ask when an output could first move. That's the contamination delay tcd, the minimum.
Adding every gate in the circuit. Delays add only along one path from an input to the output.
Mixing ns and ps in one sum. Convert to a single unit before adding.

Practice Propagation delay

Interactive questions with instant feedback and a worked solution for every wrong answer.

Adders and ALUs lesson full course

And 2 more in the Adders and ALUs lesson.

Timing and Sequential Logic lesson full course

Practice exams

Learn it step by step

Propagation delay is taught in Timing and Sequential Logic and Adders and ALUs.

Timing and Sequential Logic →Adders and ALUs →

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