Path delay

Also called: path propagation delay, delay along a path

The total delay along one route from a circuit input through a chain of gates to an output: the sum of each gate's delay on it.

A path is one route from a circuit input, through a chain of gates, to an output. A change has to pass through each gate on the route one after another, so the delays add:

Path propagation delay = the sum of each gate's tpd on it.
Path contamination delay = the sum of each gate's tcd on it.

In this course wires have zero delay, and each question gives a delay per gate type.

A circuit usually has many paths. An input that feeds two gates starts two paths, and each output has its own set. Once you have every path's delay:

the largest tpd total is the critical path, the circuit's propagation delay;
the smallest tcd total is the short path, the circuit's contamination delay.

A good habit: write each path out in full ("A → NOT → AND → OR") before adding. That stops you skipping a gate or counting one twice.

Worked example

Example

Adding along two paths

F = , built as a NOR gate feeding an AND gate whose other input is C. Delays (tpd): NOR 45 ps, AND 55 ps.

1.
A → NOR → AND: 45 + 55 = 100 ps. B has the same path, 100 ps.
2.
C → AND: 55 ps.
3.
The circuit's tpd is the largest, 100 ps.

Common mistakes

Adding delays of gates that aren't on the same path, such as two gates side by side.
Taking the average of the paths. You need the largest (or smallest), not a typical value.
Counting wires as delay when the question says to treat them as zero.

Practice Path delay

Interactive questions with instant feedback and a worked solution for every wrong answer.

Timing and Sequential Logic lesson full course

Practice exams

Timing and Sequential Logic: Exam 4 · 1 question

Learn it step by step

Path delay is taught in Timing and Sequential Logic.

Timing and Sequential Logic →

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