Short path

Also called: shortest path, min path, fastest path

The input-to-output path with the smallest total contamination delay. It sets how soon any output can start to change.

The short path is the opposite of the critical path. Add the contamination delay tcd of every gate along each input-to-output path; the path with the smallest total is the short path. Its total is the whole circuit's tcd: the earliest any output could begin to change after an input does.

Why you care: the short path is the one that can break the hold constraint. New data launched at a clock edge travels every path at once, and the fastest copy arrives first. If it reaches the capturing flip-flop before that flip-flop's hold time is over, the captured value is ruined.

Things to watch:

The short path and the critical path are usually different paths. Check every path for each.
A direct wire from one flip-flop to the next, as in a shift register, is the shortest path possible: its logic tcd is 0.
Adding a buffer to the short path fixes hold, but it also adds tpd to that path, so recheck setup.

Worked example

Example

Short path of a small circuit

F = , built as an AND gate into an OR gate into an XOR gate. Contamination delays: AND 15 ps, OR 20 ps, XOR 30 ps.

1.
A or B → AND → OR → XOR: 15 + 20 + 30 = 65 ps.
2.
C → OR → XOR: 20 + 30 = 50 ps.
3.
D → XOR: 30 ps.
4.
The smallest is 30 ps, from D. So the short path is D → XOR, and the circuit's tcd = 30 ps.
5.
With tpd values of 40, 50 and 90 ps, the critical path would be from A or B instead: a different path.

Common mistakes

Using tpd values to find the short path. It's about the minimum delays, tcd.
Assuming the short path is just the critical path read backwards. Work it out separately.
Ignoring a direct input-to-output wire or one-gate path. Those are often the shortest.

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Short path is taught in Timing and Sequential Logic.

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