Universal shift register

Also called: bidirectional shift register, 74194, multi-mode shift register, universal register

A register that can hold, shift right, shift left or load in parallel, with the operation picked by two mode-select inputs S1 S0.

A universal shift register can do four jobs, chosen at each clock edge by two mode select inputs, S1 S0. The course uses:

00: hold.
01: shift right, with the right-shift serial input SIR entering Q3.
10: shift left, with the left-shift serial input SIL entering Q0.
11: parallel load from inputs I3 … I0.

How it is built: it is the load enable idea grown up. Instead of a 2:1 multiplexer choosing keep or new, each flip-flop gets a 4:1 MUX with S1 S0 on its select lines. For bit i the four MUX inputs are:

Qᵢ itself (hold),
the bit on its left, Qᵢ₊₁ (shift right),
the bit on its right, Qᵢ₋₁ (shift left),
the parallel input Iᵢ (load).

The end bits use the serial inputs in place of a missing neighbor: Q3's shift-right input is SIR, and Q0's shift-left input is SIL. An n-bit register needs n 4:1 MUXes.

Why it is useful: one part covers SISO, SIPO, PISO and PIPO, and by wiring a serial input back to an output it can rotate or do an arithmetic shift right. The classic 74194 chip is a 4-bit universal shift register.

Like every input, the mode matters only at the rising edge. Never apply two modes at one edge.

Worked examples

Example

A sequence of modes

A 4-bit universal shift register starts at 1100. Throughout, SIR = 0, SIL = 1 and I3…I0 = 0011.

1.
Edge 1, mode 01 (shift right, SIR = 0 enters Q3): 0110.
2.
Edge 2, mode 10 (shift left, SIL = 1 enters Q0): 1101.
3.
Edge 3, mode 00 (hold): 1101.
4.
Edge 4, mode 11 (load): 0011.
5.
Method: translate the mode into an operation first, then apply it to the previous line.

Example

The MUX equation for bit 2

Write D2 for a 4-bit universal shift register using the mode table above.

1.
Hold (00) passes Q2: .
2.
Shift right (01) passes the left neighbor Q3: .
3.
Shift left (10) passes the right neighbor Q1: .
4.
Load (11) passes I2: .
5.
D2 = .

Common mistakes

Swapping the neighbors. For shift right, bit i takes the bit on its left (Qᵢ₊₁), not on its right.
Implementing hold by stopping the clock. Hold is the MUX passing Qᵢ back in.
Assuming every universal register uses the same mode table. Always check which code means left and which means right.

Practice Universal shift register

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Universal shift register is taught in Registers.

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