Most latches and flip-flops provide two outputs: Q and (read "Q bar" or "Q not"). In normal operation they are always complements: when Q = 1, = 0, and vice versa.
Why two outputs? In a cross-coupled SR latch they come for free: each gate's output is one of them. Having available also saves an inverter whenever the next logic needs the complement, for example in a frequency divider built from a D flip-flop with wired to D.
When they stop being complements: the forbidden state of an SR latch forces both outputs to the same value. On a NOR latch S = R = 1 makes both 0; on a NAND latch = = 0 makes both 1. Asserting a flip-flop's preset and clear together can do the same. This is exactly why those inputs are not allowed: the circuit no longer represents one well-defined bit.
A tracing tip: you only need to work out Q. In normal operation is simply its inverse, slot by slot.