Flip-flop conversion means adding logic in front of one type of flip-flop so that, from outside, it behaves exactly like another type.
The general recipe:
- Write the target's next state as a characteristic equation, or as a table of Q⁺ for each input and Q.
- For each row, use the excitation table of the flip-flop you actually have to find the inputs that produce that Q⁺.
- Simplify each input as a function of the target's inputs and Q.
With a D flip-flop step 2 is trivial, since D = Q⁺. So to make a D flip-flop act like anything, drive D with that thing's Q⁺.
Common conversions:
- D → T: D = .
- D → JK: D = .
- JK → T: tie J = K = T.
- JK → D: J = D, K = .
- T → JK: T = (change when J sets a 0 or K resets a 1).
- D → register bit with load L and data N: D = .
Why it matters: real chips and FPGAs provide mostly D flip-flops, so designs that are easiest to think about with JK or T flip-flops are built this way. The same idea, "put the next-state logic in front of D", is how every register and state machine is built.
| T | ||
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |