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Glitch

Also called: glitches, spike, runt pulse

A brief, unwanted pulse on a circuit output, caused by one input change reaching a gate along paths with different delays.

A glitch is a short wrong value on an output that settles back to the right one. Logically the output should stay put, or change once, but for a moment it does something else.

Why it happens: one input change often reaches the same gate along two or more paths. If those paths have different delays, the gate briefly sees a mix of old and new values, and for that moment it computes the wrong answer.

The simplest example is , which should always be 0. If A reaches the AND gate directly but comes through a slow inverter, then just after A rises both inputs are 1 for an instant, and the output pulses to 1.

A circuit's potential to glitch is called a hazard. Whether a glitch actually shows up depends on the real delays and on which way the input moves.

Does it matter? In a synchronous design, usually not: a flip-flop only looks at its D input in a small window around the clock edge, and the setup constraint guarantees the logic has settled by then. Glitches do matter on anything that reacts at once, like a clock input, an asynchronous clear, or a signal that leaves the chip.

AN = A' (slow)F = A·N

Worked example

Example

A glitch from a slow inverter

F = , built as an AND gate fed by A and by an inverter's output N. Treat the AND gate as instant and give the inverter a one-slot delay. Read the diagram above slot by slot.

  1. 1.

    Slots 1–3: A = 0, N = 1, so F = 0.

  2. 2.

    Slot 4: A rises. The inverter hasn't responded yet, so N is still 1. Both AND inputs are 1, and F pulses to 1.

  3. 3.

    Slot 5: N falls to 0, and F returns to 0.

  4. 4.

    Logically F is always 0, but the circuit produced a one-slot glitch. When A later falls, N rises a slot late and both inputs are 0 in between, so there's no glitch in that direction.

Common mistakes

  • Thinking a glitch means the logic is wrong. The Boolean function is right; the glitch comes from unequal delays.

  • Assuming every glitch breaks a synchronous circuit. If it dies out before the setup window, the flip-flop never sees it.

  • Feeding glitchy logic into a clock or asynchronous reset pin, where even a short pulse causes an action.

Practice Glitch

Interactive questions with instant feedback and a worked solution for every wrong answer.

Learn it step by step

Glitch is taught in Timing and Sequential Logic.