Latch

Also called: bistable, bistable element, latches

A level-sensitive memory element that stores one bit and can change whenever its inputs or enable allow, not just at a clock edge.

A latch is the simplest circuit that stores one bit. It is built from two gates wired in a feedback loop, so the stored value keeps itself in place after the input that set it has gone away.

The defining feature of a latch is when it can change. A latch is level sensitive: it reacts the whole time its inputs or its enable are at the active level. There is no single instant of capture.

The main kinds:

SR latch: no clock or enable. S = 1 sets Q to 1, R = 1 resets it to 0, and S = R = 0 holds.
NAND SR latch: the same idea with active-low inputs.
Gated D latch: a single data input D plus an enable. While the enable is active, Q follows D (the latch is transparent); when it goes inactive, Q freezes.

A handy picture: a latch is a window. While it is open, Q shows everything D does. Contrast a flip flop, which is a camera that takes one snapshot per clock edge. See latch vs flip flop for the full comparison.

Latches are also called bistable elements, because the feedback loop has exactly two stable states: Q = 0 and Q = 1.

Worked example

Example

A latch watches, a flip-flop snaps

A gated D latch is enabled while CLK = 1. D changes twice during one high stretch of CLK. Q starts at 0.

1.
Slot 2: the enable rises with D = 0, so Q shows 0.
2.
Slot 3: D rises while the enable is still high. The window is open, so Q follows to 1.
3.
Slot 4: D falls, still enabled. Q follows back to 0.
4.
Slots 5–6: the enable is low. Q freezes at 0, and the rise of D in slot 6 is ignored.
5.
Q changed twice during one enable pulse. A flip-flop could change at most once, at the edge.

Common mistakes

Using "latch" and "flip-flop" as exact synonyms. In this course a latch is level-sensitive and a flip-flop is edge-triggered.
Thinking a latch only updates once per enable pulse. While enabled it follows every change on its input, including glitches.
Forgetting that an SR latch has no clock at all: it responds the instant S or R changes.

Practice Latch

Interactive questions with instant feedback and a worked solution for every wrong answer.

Memory lesson full course

Which memory cell works like the cross-coupled SR latch from the Latches and Flip-Flops topic?

Practice exams

Learn it step by step

Latch is taught in Latches and Flip-Flops.

Latches and Flip-Flops →

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