Skip to content
BetterDL

Parallel load

Also called: loadable counter, presettable counter, counter load, parallel-load counter

A counter feature that copies a value from data inputs into all the flip-flops at a clock edge when LOAD = 1, instead of counting.

A loadable counter has data inputs (say D3…D0) and a LOAD control. When LOAD = 1 at a clock edge, every flip-flop takes its data input at once, in parallel, and the counter carries on counting from that value. The load is synchronous: nothing happens until the edge.

Loading lets you start a count anywhere. That's useful for timers (load a starting value, count to the end), for jumping in a sequence, and for building a mod n counter: tie the terminal count to LOAD and the counter restarts from the loaded value instead of wrapping to 0.

Counters often have several controls. At each edge the counter does exactly one thing, chosen by a fixed priority. In this course:

  1. CLR (synchronous clear to 0) beats LOAD.
  2. LOAD beats counting.
  3. With neither active, E picks between count and hold.

Inside, each flip-flop's input is a multiplexer: one choice is "next count", the other "data input", and LOAD is the select line.

Worked examples

Example

Tracing a loadable counter

A 4-bit counter with CLR, LOAD and E starts at 0110. Its data inputs are D3…D0 = 0011. Check the controls at each edge in priority order.

  1. 1.

    Edge 1: CLR = 0, LOAD = 0, E = 1 → count: 0111.

  2. 2.

    Edge 2: CLR = 0, LOAD = 1, E = 1 → LOAD wins: 0011. It does not also count.

  3. 3.

    Edge 3: CLR = 0, LOAD = 0, E = 0 → hold: 0011.

  4. 4.

    Edge 4: CLR = 1, LOAD = 1, E = 1 → CLR wins: 0000.

  5. 5.

    Edge 5: CLR = 0, LOAD = 0, E = 1 → count: 0001.

Example

Mod-6 by loading at the top

A 4-bit up counter has its terminal count (1 at 1111) wired to LOAD, and its data inputs set to 1010 (10).

  1. 1.

    It counts 10, 11, 12, 13, 14, 15.

  2. 2.

    At 15, LOAD = 1, so the next edge loads 10 instead of wrapping to 0.

  3. 3.

    States visited: 10 to 15, which is 16 − 10 = 6 states. A mod-6 counter.

Common mistakes

  • Expecting the value to appear as soon as LOAD goes high. A synchronous load waits for the next clock edge.

  • Loading and then also adding 1 at the same edge. The counter does exactly one action per edge.

  • Ignoring priority. If CLR and LOAD are both 1, the counter clears.

Practice Parallel load

Interactive questions with instant feedback and a worked solution for every wrong answer.

Registers lesson full course

Counters lesson full course

Practice exams

Related terms

Learn it step by step

Parallel load is taught in Counters.

Counters →

All terms