Two words you will see on almost every storage element:
- Set: force the stored bit to 1.
- Reset (also clear): force it to 0.
Both are absolute: they give the same result whatever Q was before. That makes them different from hold (keep Q) and toggle (flip Q), which depend on the present value.
Where they appear:
- SR latch: S is set, R is reset, and they act immediately.
- JK flip-flop: J = 1, K = 0 sets and J = 0, K = 1 resets, at the clock edge.
- Preset and clear pins: an asynchronous set and reset that act without waiting for the clock.
- Synchronous clear in a register: a reset that waits for the next edge.
Setting a bit that is already 1 changes nothing you can see, and the same goes for resetting a 0. That is why you should look for the most recent set or reset when predicting a latch's output.
A naming note: "reset" sometimes means the whole-system reset that puts every register into a known starting state. That usually means clearing most bits and setting a few, as with a power on reset.