Counters are often used to make something happen at a particular count: clear at 9, flash a light at 0, fire an event every 1000 cycles. The logic that spots that count is a state decoder.
Full decoding uses every bit. To detect one state of an n-bit counter, AND all n outputs, complementing the ones that should be 0. State 5 of a 3-bit counter is 101, so its decoder is . Decoding every state at once is just a decoder on the counter's outputs.
Decoders are cheaper for some counters:
- A ring counter needs none at all: each flip-flop is already 1 in exactly one state.
- A johnson counter needs just one 2-input AND per state.
- A mod n counter can often use partial state decoding, leaving out bits that don't matter among the states it actually visits.
One warning: a decoder on a ripple counter also sees the transient states and can put out glitches. Decode a synchronous counter, or register the decoded output, when the signal must be clean.
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 0 |